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<title>Year-2017</title>
<link href="http://repository.iiitd.edu.in/xmlui/handle/123456789/516" rel="alternate"/>
<subtitle/>
<id>http://repository.iiitd.edu.in/xmlui/handle/123456789/516</id>
<updated>2026-04-11T11:29:13Z</updated>
<dc:date>2026-04-11T11:29:13Z</dc:date>
<entry>
<title>Learning aided dynamic spectrum access in decentralized networks with unknown number of secondary users</title>
<link href="http://repository.iiitd.edu.in/xmlui/handle/123456789/605" rel="alternate"/>
<author>
<name>Pani, Suman</name>
</author>
<author>
<name>Darak, Sumit Jagdish (Advisor)</name>
</author>
<id>http://repository.iiitd.edu.in/xmlui/handle/123456789/605</id>
<updated>2021-12-13T09:20:22Z</updated>
<published>2017-09-17T00:00:00Z</published>
<summary type="text">Learning aided dynamic spectrum access in decentralized networks with unknown number of secondary users
Pani, Suman; Darak, Sumit Jagdish (Advisor)
Opportunistic spectrum access (OSA) in a decentralized network is a challenging problem since each unlicensed user (i.e. cognitive radio (CR)) needs to characterize frequency bands as per the occupancy statistics of multiple licensed users. In dynamic and heterogeneous networks, all CRs may not be active simultaneously and can leave or join the network at any time. This makes OSA more challenging especially in the decentralized network where active CRs do not have any knowledge of other CRs in the network. In this thesis, a new decision making policy (DMP) using online learning algorithms has been proposed for characterization of frequency bands and orthogonalization of CRs into different but optimal bands. The proposed DMP, when implemented at all CRs in decentralized network, leads to an order-optimal policy. There are two main underlying strategies 1) learning the sub-band availability, which helps to reduce the long waiting time due to occupancy by primary user (PU), and 2) learning the efficiency of rank, which helps in reducing collision among the secondary users (SUs). For the fixed number of SUs, the loss in throughput decreases by 63% in case of 4 SUs and 46.6% in case of 6 SUs compared to existing state-of-art DMPs, Musical Chair (MC). For varying number of SUs, the loss in throughput decreases by 81.5% in case of 4 SUs and 84.8% in case of 6 SUs compared to MC.
</summary>
<dc:date>2017-09-17T00:00:00Z</dc:date>
</entry>
<entry>
<title>Wide bandgap-HEMT device (GaN) modelling for high power amplifier design</title>
<link href="http://repository.iiitd.edu.in/xmlui/handle/123456789/603" rel="alternate"/>
<author>
<name>Batra, Shipra</name>
</author>
<author>
<name>Hashmi, Mohammad S. (Advisor)</name>
</author>
<id>http://repository.iiitd.edu.in/xmlui/handle/123456789/603</id>
<updated>2018-01-30T22:00:13Z</updated>
<published>2017-01-01T00:00:00Z</published>
<summary type="text">Wide bandgap-HEMT device (GaN) modelling for high power amplifier design
Batra, Shipra; Hashmi, Mohammad S. (Advisor)
Material properties of wide-bandgap semiconductors are excellent candidates to build highly-efficient and highly-linear power amplifiers required to support cellular communication. AlGaN/GaN HEMTs are considered the most capable of all available wide-bandgap devices, as they combine material properties of GaN with the principle of HEMTs. &#13;
This dissertation presents a large-signal modelling strategy for small-sized (4*100 μm) AlGaN/GaN HEMT that is capable of being ported to computer-aided design of power amplifiers. &#13;
A large signal model capable of simulating the output power and non-linear behavior of the device is very crucial for the design of a Power Amplifier. This is the main problem addressed by this thesis. Large signal modelling begins with the development of a linear model. A bottom-up empirical modelling approach is followed in this work. It required selecting an appropriate electrical equivalent circuit which accounted for the complex parasitic and maintained a clear physical interpretation of the model parameters. Further, an efficient algorithm for extracting and optimizing parasitic is adopted. This has set the foundation for non-linear modelling. &#13;
The large-signal model includes a non-quasi static formulation of the gate-charge and a dispersive-drain current (Ids) model. Non-quasi static parameters are calculated from small-signal intrinsic parameters by using path-integrals. Various mathematical interpolation techniques are applied while doing integration taking care that the parameters do not lose their physical significance. The Ids-model parameter extraction is based on DC-IV and pulsed-IV measurements. Large-signal models are developed and directly implemented in CAD-software to perform model simulations. The results of the simulations performed are compared with the measured data. The results show high correlation between them making it a competent model for High Power Amplifier design for small-sized AlGaN/GaN devices.
</summary>
<dc:date>2017-01-01T00:00:00Z</dc:date>
</entry>
<entry>
<title>Design of tri-band coupler and wideband phase shifter</title>
<link href="http://repository.iiitd.edu.in/xmlui/handle/123456789/602" rel="alternate"/>
<author>
<name>Ahlawat, Anuradha</name>
</author>
<author>
<name>Hashmi, Mohammad S. (Advisor)</name>
</author>
<id>http://repository.iiitd.edu.in/xmlui/handle/123456789/602</id>
<updated>2018-01-30T22:00:12Z</updated>
<published>2017-08-01T00:00:00Z</published>
<summary type="text">Design of tri-band coupler and wideband phase shifter
Ahlawat, Anuradha; Hashmi, Mohammad S. (Advisor)
Branch-line coupler and phase shifter are widely used passive components in RF and microwave communication systems. The designing of circuits operating at multi-band frequencies has the advantage of both compact size and cost. Therefore, it becomes very fascinating to design the RF and microwave circuits with such specifications. This thesis work has been divided into two parts. The first part focuses on the designing of Tri-band coupler with a port matching technique in which architecture of 3-dB tri-band branch line coupler operating at three arbitrary frequencies is presented. It is capable to provide a phase shift of 90º and equal power division at its output ports. To validate the proposed design procedure, a coupler working at 1.8 GHz, 2.4 GHz and 3.5 GHz is prototyped.&#13;
The second part of the thesis work focuses on designing and validation of wideband phase shifter circuit with stub loaded transmission lines in which a modified architecture of wideband phase shifter having 90º phase shift is presented. A number of design examples capable of multiple phases shift up to 90º for a wide bandwidth are presented to demonstrate the effectiveness of the proposed phase shifter. The designed phase shifters have a bandwidth of operation 190MHz around central frequency. To validate the reported design procedure, a 90º phase shifter working at 1.8 GHz is prototyped. The proposed design is able to provide the 90º phase difference over a bandwidth of 106 % considering only 3º phase ripples. Both designs are prototyped on Rogers5880 substrate with thickness of 1.575 mm and dielectric constant of 2.2. All EM Simulated and results measured with VNA are in good agreement with each other.
</summary>
<dc:date>2017-08-01T00:00:00Z</dc:date>
</entry>
<entry>
<title>FPGA implementation of multi-standard wireless transceiver via dynamic partial reconfiguration</title>
<link href="http://repository.iiitd.edu.in/xmlui/handle/123456789/601" rel="alternate"/>
<author>
<name>Deep, Gyan</name>
</author>
<author>
<name>Darak, Sumit Jagdish (Advisor)</name>
</author>
<id>http://repository.iiitd.edu.in/xmlui/handle/123456789/601</id>
<updated>2021-12-13T09:20:01Z</updated>
<published>2017-12-15T00:00:00Z</published>
<summary type="text">FPGA implementation of multi-standard wireless transceiver via dynamic partial reconfiguration
Deep, Gyan; Darak, Sumit Jagdish (Advisor)
To support wide variety of services ranging from voice, high-speed data and multimedia, multi-standard wireless communication transceivers (MWCT) are desired. Such transceivers have the capability to adapt to any desired data rate, bandwidth and center frequency depending on the environmental conditions (for example, wireless channel, distance between transmitter and receiver, multipath fading, jammers etc.). Conventional MWCT employs Velcro approach where multiple communication standards are supported using parallel signal processing chains, one for each standard. This technique is straightforward and fast but there are also some major drawbacks associated with it like more area requirement and overall high power consumption and hence, not suitable for battery operated resource-constrained wireless transceivers. Due to the re-configurable architecture of Field Programmable Gate Array (FPGA), it has become an attractive platform to implement the wireless testbeds. Also, due to its inherent parallel architecture support, FPGA is ideal for implementing parallel operations like FFT/IFFT computation and digital filter implementation as required in these wireless transceivers.&#13;
Excess area and power utilization of Velcro method can be reduced by using the dynamic partial reconfiguration technique. In this approach, only the blocks like qpsk modulation/demodulation blocks which need to be changed are swapped with the required blocks like 16-qam modulation/demodulation blocks according to the requirements. This approach leads to reduction of area utilization from sum of all the area required for implementing different versions of a particular block (i.e. parallel implementation) to area which is required by biggest version (in terms of area) of a particular block. Also, in this approach, the rest of design can work uninterruptedly while the reconfiguration is taking place.&#13;
The main aim of this thesis is to demonstrate a working hardware testbed which implements a transceiver supporting dynamic partial recon_guration technique. The proposed MWCT can adapt the modulation scheme as well as the transmission bandwidth by partial reconfiguration of modulation and IFFT/FFT blocks of the transceiver. We discuss software controlled as well as hardware controlled approaches by which the partial reconfiguration can be enabled. We demonstrate the proposed approach on the 802.11a transceiver protocol realized on Zynq SoC using verilog. At the end, we compare the gain in area and power consumption over conventional Velcro approaches. Also, filters are implemented at the end of transmitter and beginning of receiver to demonstrate the implementation of filtered OFDM
</summary>
<dc:date>2017-12-15T00:00:00Z</dc:date>
</entry>
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