http://repository.iiitd.edu.in/xmlui/handle/123456789/212 2026-04-11T11:41:53Z http://repository.iiitd.edu.in/xmlui/handle/123456789/335 BluePark : tracking parking and un-parking events in indoor parking lot Soubam, Sonia; Naik, Vinayak; Banerjee, Dipyaman; Chakraborty, Dipanjan Finding a parking spot in a busy indoor parking lot is a daunting task. Retracing a parked vehicle can be equally frustrating. We present BluePark, a collaborative sensing mechanism using smartphone sensors to solve these problems in real-time, without any input from user. We propose a novel technique of combining accelerometer and WiFi data to detect and localize parking and un-parking events in indoor parking lot. We validate our approach at the basement parking of a popular shopping mall. The proposed method out-performs Google Activity Recognition API by 20% in detecting drive state in indoor parking lot. Our experiments show 100% precision and recall for parking and un-parking detection events at low accelerometer sampling rate of 15Hz, irrespective of phone’s position. It has a low detection latency of 20 seconds with probability of 0.9 and good location accuracy of 10 meters. 2015-10-26T03:37:01Z http://repository.iiitd.edu.in/xmlui/handle/123456789/283 Analyzing mutable checkpointing via invariants Aggarwal, Deepanker; Kiehn, Astrid The well-known coordinated snapshot algorithm of mutable checkpointing [7{9] is studied. We equip it with a concise formal model and analyze its operational behavior via an invariant characterizing the snapshot computation. By this we obtain a clear understanding of the intermediate behavior and a correctness proof of the fi nal snapshot based on a strong notion of consistency (reachability within the partial order representing the underlying computation). The formal model further enables a comparison with the blocking queue algorithm [13] introduced for the same scenario and with the same objective. From a broader perspective, we advocate the use of formal semantics to formulate and prove correctness of distributed algorithms. 2015-09-10T09:41:32Z http://repository.iiitd.edu.in/xmlui/handle/123456789/271 Inference-based LLC-side access pattern estimation for shared cache modeling on commercial processors Hemani, Rakhi; Banerjee, Subhasis; Guha, Apala Cache contention modeling is necessary for good resource utilization on commercial multicore processors. Our goal is to build cache contention models that are sensitive to changes in, 1) the micro-architecture, 2) the co-runner set of each application, and, 3) the inputs to an application. There are two challenges in achieving this goal: 1) it is di cult to deter- mine the LLC behavior for a given memory access pattern, and, 2) it is di cult to obtain the memory access pattern that reaches the LLC. We propose, 1) a methodology to generate the behavioral model of LLCs on protected-technology multicore processors, and, 2) an inference- based approach to estimate the LLC-side memory access patterns. We build a cache contention model that uses the behavioral LLC models and the LLC-side memory access patterns. We evaluated the cache contention model on two commercial multicores with Sandy Bridge and Ivy Bridge micro-architectures respectively, using more than a thousand combina- tions of nine SPEC CPU2006 benchmarks. The average prediction error was 5.74% and 7.27% respectively. 2015-05-19T06:50:10Z http://repository.iiitd.edu.in/xmlui/handle/123456789/224 Biclique cryptanalysis of full round AES-128 based hashing modes Chang, Donghoon; Ghosh, Mohona; Sanadhya, Somitra Kumar In this work, we revisit the security analysis of AES-128 instantiated hash modes. We use biclique cryptanalysis technique as our basis for the attack. The traditional biclique approach used for key recovery in AES (and preimage search in AES based compression function) cannot be applied directly to hash function settings due to restrictions imposed on message input due to padding. Under this criteria, we show how to translate biclique technique to hash domain and demonstrate preimage and second preimage attack on all 12 PGV modes. Our preimage attack complexity for all PGV modes stands at 2127.4. The second preimage attack complexities differ based on the PGV construction chosen - the lowest being 2126.3 and the highest being 2126.67 complexity. We also show how to model our attacks under different settings, e.g., when message is padded/ not padded, when chaining variable is known/not known, when full message or key space is available/ not available to the attacker etc. Our attacks require only 2 message blocks with padding included and works on full 10 rounds of AES-128 for all 12 PGV modes. In our attacks, the IV is assumed to be a known constant which is a practical assumption but knowledge of other chaining variables is not required for the attacker. Considering these, our results can be termed as the best so far in literature. Though our attack results do not significantly decrease the attack complexity factor as compared to brute force but they highlight the actual security margin provided by these constructions. 2015-03-23T04:05:04Z