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http://repository.iiitd.edu.in/xmlui/handle/123456789/1006Full metadata record
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Sharma, Somya | |
| dc.contributor.author | Gupta, Mansi | |
| dc.contributor.author | Darak, Sumit Jagdish (Advisor) | |
| dc.contributor.author | Joshi, Himani (Advisor) | |
| dc.date.accessioned | 2022-04-01T09:32:21Z | |
| dc.date.available | 2022-04-01T09:32:21Z | |
| dc.date.issued | 2021-05 | |
| dc.identifier.uri | http://repository.iiitd.edu.in/xmlui/handle/123456789/1006 | |
| dc.description.abstract | The deployment of cellular spectrum in licensed, shared and unlicensed spectrum demands wideband sensing over non-contiguous sub-6 GHz spectrum. To improve the spectrum and energy efficiency, beam forming and massive multi-antenna systems are being explored which demand spatial sensing i.e. blind identification of vacant frequency bands and direction-of- arrival (DoA) of the occupied bands. We propose a reconfigurable architecture to perform spatial sensing of baseband digitized multi-band spectrum obtained via radio front-end comprising of sparse antenna array (SAA) and Sub-Nyquist Sampling (SNS). Proposed architecture includes SAA pre-processing and algorithms which performs spatial sensing directly on SNS samples. The proposed architecture is realized on Zynq System on Chip (SoC), consisting of ARM processor and FPGA, via hardware software co-design (HSCD). Using the dynamic partial reconfiguration (DPR), on-the-y switching between algorithms depending on the number of active signals in sensed spectrum is enabled. The functionality, resource utilization and execution time of the proposed architecture is analyzed for different HSCD configurations, word-length, number of digitized samples, signal-to-noise ratio (SNR) and antenna array (sparse/non-sparse). | en_US |
| dc.language.iso | en_US | en_US |
| dc.publisher | IIIT- Delhi | en_US |
| dc.subject | DOA Estimation | en_US |
| dc.subject | Sparse Antenna Array | en_US |
| dc.subject | Hardware Software Co-design | en_US |
| dc.subject | Zynq SoC | en_US |
| dc.subject | Partial recon guration | en_US |
| dc.title | DOA estimation via hardware-software co-design | en_US |
| dc.type | Other | en_US |
| Appears in Collections: | Year-2021 | |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| Somya Sharma_2017198, Mansi Gupta_2017165.pdf Restricted Access | 1.35 MB | Adobe PDF | View/Open Request a copy |
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