IIIT-Delhi Institutional Repository

Browsing Electronics and Communication Engineering by Author "Saurabh, Sneh (Advisor)"

Browsing Electronics and Communication Engineering by Author "Saurabh, Sneh (Advisor)"

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  • 16 Bit retransmission based chipless RFID tag 
    Malhotra, Sambhav; Hashmi, Mohammad S. (Advisor); Biswas, Sanat (Advisor); Saurabh, Sneh (Advisor) (IIITD-Delhi, 2018-11-18)
    A 16-bit Chipless RFID tags have been proposed in this report. The design will be fabricated on a Rogers RT 5880 board with a dielectric constant of 2.2 and a loss tangent of 0.0009. The tag is based on the concept of ...
  • An artificial neural network based incremental placer for wire length reduction 
    Gagandeep; Saurabh, Sneh (Advisor) (IIIT-Delhi, 2022-08)
    The total wire length of a design affects various QoR measures such as timing, power, and routability. Hence, it is a critical parameter to optimize in physical design. Post global routing, the total wire length can be ...
  • Improving the retention time of a dopingless 1T DRAM using gate engineering 
    Agarwal, Nimish; Saurabh, Sneh (Advisor) (IIIT-Delhi, 2019-07)
    In this thesis, a dopingless 1T DRAM with a high retention time is proposed. The high retention time is achieved by suppressing the diffusion current in the device which is responsible for degrading the “0” state. In the ...
  • Investigation of timing of logic gates realized using probabilistic spin logic (PSL) 
    Bhatia, Ishan; Saurabh, Sneh (Advisor) (IIIT-Delhi, 2019-07)
    Probabilistic Spin Logic (PSL) is a fascinating computing model composed of fundamental stochastic units called probabilistic bits (p-bits). A p-bit can be realized using low-barrier nanomagnets. It can be combined to ...
  • Multilevel rram design using confinement of conducting Filament 
    Kapur, Shagun; Gupta, Varshita; Saurabh, Sneh (Advisor); Grover, Anuj (Advisor) (IIITD-Delhi, 2019-04-25)
    There are several types of electronic memory employed across the globe for a huge variety of applications. These include fast, volatile technologies such as SRAM and DRAM, and slower, non-volatile technologies such as NAND ...
  • Nanoscale tunnel field-effect transistors for digital circuit applications: design and analysis 
    Garg, Shelly; Saurabh, Sneh (Advisor) (IIIT-Delhi, 2022-02)
    Metal–oxide–semiconductor field-effect transistor (MOSFET) has been used for decades in the semiconductor industry. However, with the continuous downscaling of the device dimensions to the nanometer regime, conventional ...
  • A practical methodology to waive marginal timing violations using machine learning 
    Kumar, Rajat; Saurabh, Sneh (Advisor) (IIIT-Delhi, 2022-07)
    Achieving timing closure is a challenging task, and it becomes more complicated due to the artificial pessimism in the traditional timing models of the flip-flops. During the signoff stages, we can alleviate this problem ...
  • Realizing and functionality using single tunnel field-effect transistor 
    Banerjee, Saptak; Saurabh, Sneh (Advisor) (IIIT-Delhi, 2018-07)
    In this thesis, a single Double-Gate Tunnel Field-Effect Transistor (DGTFET) is proposed to realize the AND functionality. Using two-dimensional device simulations, it is shown that a single DGTFET can realize logic ...

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