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http://repository.iiitd.edu.in/xmlui/handle/123456789/1518Full metadata record
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Malhotra, Ishan | - |
| dc.contributor.author | Grover, Sarthak | - |
| dc.contributor.author | Deb, Sujay (Advisor) | - |
| dc.date.accessioned | 2024-05-18T09:38:23Z | - |
| dc.date.available | 2024-05-18T09:38:23Z | - |
| dc.date.issued | 2023-11-29 | - |
| dc.identifier.uri | http://repository.iiitd.edu.in/xmlui/handle/123456789/1518 | - |
| dc.description.abstract | Applying the OpenROAD toolchain to a Cortex-M0-based System on Chip (SoC) is the first step in this ground-breaking project's RTL-to-GDSII (R2G2) pipeline. The OpenROAD toolchain and scripts must be carefully modified and used to complete the task, emphasizing the SKY130 PDK. By focusing on using open-source tools and methodologies—currently crucial in the semiconductor design and manufacturing landscape—this program embodies a paradigm shift in system-on-chip (SoC) design. We want to show that the OpenROAD toolchain can handle the complexity of current SoC architecture and justify its usefulness in a real-world setting. To do this, the OpenROAD scripts must undergo extensive testing, validation, and modification to match the specifications of the Cortex-M0-based system on a chip (SoC) architecture. This procedure exemplifies how the OpenROAD ecosystem may adjust to the nuances of various PDKs. In addition, the project makes strategic use of the OpenROAD team's open-source tools and scripts. Skillfully navigating these technologies requires knowledge of how to use them, how they work, if they can be customized, and how to integrate them into a smooth flow. The knowledge gained at this stage is priceless since it reveals the ins and outs of using open-source tools for system-on-chip design. At last, the project moves on to the OpenLane flow, which includes OpenROAD as a crucial sub-step. Aligning with the larger ecosystem of open-source SoC design approaches is the strategic goal of this transition. Sending the approved GDSII for manufacture via the Efabless-Google-Skywater Shuttles is the last step of the project. It is vital to bring the SoC from its digital form to its physical one; this step signifies the end of the design phase. To sum up, this initiative is not just about utilizing the OpenROAD toolchain to sign off on a whole system-on-chip design, but it also attempts to establish a standard for using open-source tools for SoC design and manufacturing. | en_US |
| dc.language.iso | en_US | en_US |
| dc.publisher | IIIT-Delhi | en_US |
| dc.title | Openlane RTL-to-GDSII (R2G2) flow for home-grown soc | en_US |
| dc.type | Other | en_US |
| Appears in Collections: | Year-2023 | |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| BTP_Report - Ishan Malhotra.pdf Restricted Access | 4.77 MB | Adobe PDF | View/Open Request a copy |
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