Novel approach to reusable time-economized STIL based pattern development

Abstract

State of the art automotive microcontrollers (MCUs) implementing complex system-on-chip (SoC) architectures requires often additional functional patterns to achieve high degree of reliability. Functional pattern family includes test patterns checking internal device functionality under nominal condition. The development of these patterns is required to augment structural tests to achieve high test coverage. Moreover, it should be planned to minimize test time since it has direct impact on time to market. This thesis proposes a reusable and time-economized approach for functional test pattern development aimed for production tests using Test Information Model (TIM) discussed. The flow is also automated to exclude the potential source of error in the pattern generation. In applying this methodology, there is approximately 60%-70% reduction in pattern time as compared to conventional simulation based pattern development which required cyclization of simulation data to be compatible to testers used for production tests. Moreover, proposed automated production test pattern development activity is smooth as compared to manual approach and its availability is also aligned with the first veri ed RTL. Also, the results show the e fficiency of this approach in terms of pattern re-usability by further reducing man-hours of the test engineer.