Please use this identifier to cite or link to this item:
http://repository.iiitd.edu.in/xmlui/handle/123456789/865Full metadata record
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Tyagi, Aakash | |
| dc.contributor.author | Grover, Anuj (Advisor) | |
| dc.contributor.author | Rawat, Harsh (Advisor) | |
| dc.date.accessioned | 2021-03-26T04:47:43Z | |
| dc.date.available | 2021-03-26T04:47:43Z | |
| dc.date.issued | 2020-06 | |
| dc.identifier.uri | http://repository.iiitd.edu.in/xmlui/handle/123456789/865 | |
| dc.description.abstract | In recent years, there has been a very rapid advancement in the area of phase-changing materials, due to which there has been a substantial improvement in Phase-change memories (PCM) and its technology. Due to scaling limitations in flash memories, PCM seems to be the most promising alternative among the various emerging Non-Volatile Memories (NVM). Their ability to store more than two levels of data can be exploited to store multiple bits within a single PCM cell. In this work, we have defined a sensing scheme for reading the data stored in the PCM cell, which has the capability of storing 2bits/cell. This sensing architecture has the capability of sensing both the bits in one read cycle, also called parallel sensing. The access time of the proposed scheme is 12.04 nS with a targeted nominal current offset of 1uA. The area of the circuit is 327um2, and the average power per reading is 106uW | en_US |
| dc.language.iso | en_US | en_US |
| dc.publisher | IIIT-Delhi | en_US |
| dc.subject | Memory Devices, Flash Memory, NVM technology, Amplifier, PCM | en_US |
| dc.title | Multilevel sense amplifier sensing for phase change memory | en_US |
| dc.type | Thesis | en_US |
| Appears in Collections: | Year-2020 | |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| MT18151_Aakash Tyagi.pdf | 3.3 MB | Adobe PDF | View/Open |
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.