Please use this identifier to cite or link to this item: http://repository.iiitd.edu.in/xmlui/handle/123456789/865
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dc.contributor.authorTyagi, Aakash
dc.contributor.authorGrover, Anuj (Advisor)
dc.contributor.authorRawat, Harsh (Advisor)
dc.date.accessioned2021-03-26T04:47:43Z
dc.date.available2021-03-26T04:47:43Z
dc.date.issued2020-06
dc.identifier.urihttp://repository.iiitd.edu.in/xmlui/handle/123456789/865
dc.description.abstractIn recent years, there has been a very rapid advancement in the area of phase-changing materials, due to which there has been a substantial improvement in Phase-change memories (PCM) and its technology. Due to scaling limitations in flash memories, PCM seems to be the most promising alternative among the various emerging Non-Volatile Memories (NVM). Their ability to store more than two levels of data can be exploited to store multiple bits within a single PCM cell. In this work, we have defined a sensing scheme for reading the data stored in the PCM cell, which has the capability of storing 2bits/cell. This sensing architecture has the capability of sensing both the bits in one read cycle, also called parallel sensing. The access time of the proposed scheme is 12.04 nS with a targeted nominal current offset of 1uA. The area of the circuit is 327um2, and the average power per reading is 106uWen_US
dc.language.isoen_USen_US
dc.publisherIIIT-Delhien_US
dc.subjectMemory Devices, Flash Memory, NVM technology, Amplifier, PCMen_US
dc.titleMultilevel sense amplifier sensing for phase change memoryen_US
dc.typeThesisen_US
Appears in Collections:Year-2020

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