http://repository.iiitd.edu.in/xmlui/handle/123456789/1 CSE 2026-06-10T19:21:14Z http://repository.iiitd.edu.in/xmlui/handle/123456789/1983 Exploring alias analysis based optimizations missed by the compiler Chitre, Khushboo; Kedia, Piyus (Advisor); Rahul, Purandare (advisor) Alias analysis is a technique to determine whether a pair of pointers points to overlapping memory locations. Alias information (especially non-overlapping of pointers) is critical for enabling key transformations such as vectorization, redundant code elimination, loop-invariant code motion, and so on. Context-sensitive interprocedural alias analyses are generally more precise than intraprocedural analyses, but they are often not scalable for large, real-world programs. While context-insensitive interprocedural analyses are more scalable, they significantly sacrifice precision due to call-site merging and conservative assumptions. As a consequence, most of the production compilers sacrifice precision for scalability and implement intraprocedural alias analysis. Moreover, purely static alias analyses are often too conservative when aliasing depends on runtime inputs, calling contexts, or control-flow conditions, especially in cases where pointers overlap only for specific or rare executions. We first proposed a tool to estimate the upper bound on the performance of SPEC benchmarks in the presence of the most precise aliasing information. The key idea was to profile SPEC benchmarks to log alias information, use them to optimize the program, and obtain an upper bound on the likely performance improvement using the most precise alias analysis. Here, the upper bound is an empirical, input-dependent estimate of the performance improvement achievable through improved aliasing precision. We found that an execution time improvement of up to 11.56% is possible for the SPEC benchmarks. Additionally, we found that up to 53.32% execution time improvement is possible for Polybench benchmarks. Polybench benchmarks are used to evaluate the effectiveness of loop transformations. To improve the precision of alias analysis, several prior works propose combining code versioning with dynamic checks to preserve the scalability of alias analyses while selectively improving precision in performance-critical regions. These approaches do not increase alias analysis precision, instead, they use runtime checks to improve the effectiveness of alias analysis in enabling optimizations. These techniques are particularly effective when applied at the loop granularity, since loops often dominate runtime. However, most of these approaches are restricted to loops with either loop-invariant bounds or have very high overheads of dynamic checks, which limit their applicability. This thesis proposes two approaches to reduce the overhead of dynamic checks to constant time. The first approach constrains the allocation size and alignment of the memory objects using a segment-based allocator to reduce the overhead of the dynamic checks to constant time. We achieved a CPU performance improvement of up to 1.47% with a geometric mean of 0.55% for the SPEC benchmarks. The allocator introduced a maximum overhead of 8.36%, with a geometric mean of 1.47% across all SPEC benchmarks. For Polybench benchmarks, we achieved up to 51.11% CPU performance improvement. The allocator introduced a maximum overhead of 5.3%, with a geometric mean of 0.21% across all Polybench benchmarks. Our second approach reduces allocator overhead by selectively constraining memory allocations. We also proposed a region-based allocation strategy that eliminates the need for memory accesses in the dynamic checks. This approach never resulted in performance degradation and achieved improvements of up to 1.88% with a geometric mean of 0.58% on SPEC benchmarks. The maximum CPU overhead of our allocator is 0.57% with a geometric mean of -0.2% for SPEC benchmarks. Both our approaches outperform a previous approach to disambiguate pointers, which reported a 29% overhead for a SPEC CPU 2006 benchmark. The primary contribution of this thesis is the development of a dynamic disambiguation approach that can be applied to enhance the performance of real-world, largescale applications. 2026-04-01T00:00:00Z http://repository.iiitd.edu.in/xmlui/handle/123456789/1981 Deep learning based electromagnetic field estimation for neural engineering applications Kumar, Vickery; Kumar, Suyash; Surya, Pourav; Kosta, Pragya (Advisor); Sarkar, Shamik (Advisor); Singh, Pushpender (Advisor) Understanding neural activity through stimulation offers significant potential for neuroscience research and clinical applications. However, experimental setups involving magnetic or electrical stimulation, such as those used to analyze neural responses in the rat sciatic nerve, are often resource-intensive and costly. This project proposes a deep learning-based approach to predict neural response data, eliminating the need for physical stimulation hardware. Leveraging previously collected data from simulations and experimental setups, we aim to train a model that accurately predicts neural excitation under various stimulation conditions. This novel approach has the potential to reduce costs, streamline experiments, and enable scalable analysis of neural activity, fostering advancements in neuroengineering research . 2024-12-11T00:00:00Z http://repository.iiitd.edu.in/xmlui/handle/123456789/1980 ConcurBench: a benchmark framework for evaluating LLM-generated concurrent code Gupta, Kshitij; Chaterjee, Bapi (Advisor) This thesis presents ConcurBench, a novel benchmark framework designed to evaluate the capa- bilities of Large Language Models (LLMs) in generating concurrent code. Concurrent program- ming remains one of the most challenging domains in software development, requiring careful attention to thread safety, synchronization, and race conditions. As LLMs increasingly become part of software development workflows, understanding their ability to generate correct concur- rent code is crucial. ConcurBench addresses this need by providing a comprehensive evaluation framework that ex- tracts high-quality concurrent functions from popular open-source repositories, annotates them with natural language requirements, and tests LLMs’ ability to regenerate these functions with varying levels of context. The framework implements a multi-level context evaluation approach, testing LLMs with no context (function signature only), local context (surrounding function- s/imports), and full context (entire file context). The thesis details the design and implementation of ConcurBench’s pipeline architecture, in- cluding repository discovery and collection, function extraction, test discovery, LLM annotation, function generation, and evaluation. Key innovations include a dynamic test harness generation system that can compile and test LLM-generated code against original implementations without modification, and an orchestration wrapper script that enables scalable, automated evaluation across multiple functions and LLMs. Experimental results demonstrate that context significantly impacts LLMs’ ability to generate correct concurrent code, with full context providing substantial improvements in functional correctness. The benchmark provides valuable insights into the strengths and limitations of current LLMs in handling concurrent programming tasks and establishes a methodology for evaluating future advancements in this domain. 2025-07-17T00:00:00Z http://repository.iiitd.edu.in/xmlui/handle/123456789/1979 Development of an interactive wall using computer vision Dabas, Ram; Dagar, Kartik; Tejas, Kumar; Shankhwar, Kalpana (Advisor); Ratn, Anoop (Advisor) This report presents the development of an Interactive Wall, a gesture-based drawing application that integrates Computer Vision, Machine Learning, and Unity to enable intuitive interaction with a virtual canvas. Using Mediapipe, the system captures real-time hand and body gestures for seamless drawing, erasing, and interaction. Key advancements include robust tracking algorithms, efficient Python-Unity communication via gRPC and UDP, and advanced rendering techniques such as shaders, decals, and render textures to create realistic brush strokes and effects. Unity’s physics engine adds dynamic, lifelike interaction with virtual objects, enhancing immersion. Optimizations such as Kalman filtering for smoother gestures and post-processing for visual enhancements improve accuracy and responsiveness. The system is scalable, can support multi-user interaction, AI-based gesture prediction, and customizable brush textures to enrich the user experience after further developments. This report outlines the design, implementation, and testing phases, addressing challenges like occlusions and real-time performance. The Interactive Wall demonstrates the togetherness of gesture recognition and immersive virtual environments, offering a novel and engaging digital interaction platform. 2024-11-27T00:00:00Z