IIIT-Delhi Institutional Repository

Browsing by Author "Deb, Sujay (Advisor)"

Browsing by Author "Deb, Sujay (Advisor)"

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  • Analysis and estimation of jitter sub-components 
    Sharma, Vijender Kumar; Deb, Sujay (Advisor) (IIIT Delhi, 2014-09-06)
    Maintaining quality of signal transmission is a major challenge with the increasing speed of data transmission in Nano-scale VLSI technology. The decreasing voltage margins at the same time, makes it even stringent to ...
  • Anomaly detection and classification from CCTV camera feed 
    Aakash; Chauhan, Lakshay; Sharma, Shubham; Deb, Sujay (Advisor) (IIIT-Delhi, 2023-11-29)
    Recently, there has been an increase in the frequency of crimes and accidents, posing a growing challenge for humans to report these incidents to the relevant authorities promptly. It is nearly impossible for humans to ...
  • Approximate computing as a means of fault tolerance in mWNoCs 
    Joshua, Massa; Deb, Sujay (Advisor) (IIIT-Delhi, 2023-10-29)
    In the realm of chiplet-based computing, the advent of Network-on-Chip (NoC) technology has brought forth remarkable opportunities to harness the potential of on-chip wireless communication. This report embarks on a ...
  • ARM cortex-M3 based SoC design for drones 
    Viyaash, V.; Aggarwal, Shivanshu; Deb, Sujay (Advisor) (IIIT-Delhi, 2023-11-29)
    This project report investigates the development of a drone control system using ARM Cortex-M3 based System on Chip (SoC) and the need for indigenously designed SoCs. The objective was to interface the Cortex M3 processor, ...
  • Comprehensive analysis of pose estimation and vital sign monitoring systems 
    Lakshay; Singh, Sarthak; Garg, Sanyam; Deb, Sujay (Advisor) (IIIT-Delhi, 2025-07-18)
    This report provides a comprehensive analysis of modern techniques for contactless health mon- itoring, focusing on the integration of real-time pose estimation and physiological vital sign measurement. It begins by ...
  • Design and development of smartphone based health monitoring system 
    Kochar, Adwit Singh; Bansal, Pabitra; Singh, Rahul; Agrawal, Yashwin; Deb, Sujay (Advisor) (IIIT-Delhi, 2021-12)
    Critical health parameters such as SpO2 and Blood Pressure play a massive role in determining a person’s health condition, and hence their tracking and monitoring are essential. Currently, the problem with health monitoring ...
  • Development and enhancement of verification environment for complex designs 
    Madan, Raghav; Deb, Sujay (Advisor) (2015-12-07)
    Digital VLSI design verification is a process of checking and verifying the correctness of design functionality with respect to the documented specications. Functional verification of a complex IP or sub-system, formed by ...
  • Development of open source multicore system 
    Ayyagari, Krishna; Deb, Sujay (Advisor) (IIIT-Delhi, 2024-12)
    This project aims to create an open-source, cache-coherent multicore system that uses the combined processing power of multiple cores arranged in a network-on-chip (NoC) architecture. This semester, the project focused on ...
  • An effective and efficient methodology for SoC power management through UPF 
    Anusha, Renduchinthala; Deb, Sujay (Advisor) (2016-09-12)
    With technology scaling and increase of chip complexity, power consumption of chip has been rising and its power architecture is getting complicated. Many power management techniques like power gating, multi-voltage, ...
  • Efficient communication in heterogeneous architectures 
    Gade, Narayana Sri Harsha; Deb, Sujay (Advisor) (IIIT-Delhi, 2020-08)
    Advanced CMOS manufacturing technologies and limitations of power scaling have ushered processing chip architectures into the era of multi-core and many core systems. Simultaneously, there has been an emergence of compute ...
  • Efficient post-silicon debug platforms for future many-core systems 
    Rout, Sidhartha Sankar; Deb, Sujay (Advisor) (IIIT-Delhi, 2023-06)
    As the computation is moving towards the exascale era, more and more number of processing cores of heterogeneous natures are getting embedded in a System-on-Chip (SoC). The growing demands for high-performance and increased ...
  • Emerging communication infrastructure for intra and inter chip communications 
    Kumar, Madhur; Deb, Sujay (Advisor) (IIIT-Delhi, 2022-12)
    With new emerging technologies, designing with wired, wireless and optical interconnects will become easier. When designers have these three interconnect options, choosing between them and using the suitable interconnect ...
  • An energy-efficient hybrid DAC based SAR ADC using deep-submicron CMOS and large-area oxide TFT technologies 
    Tiwari, Bhawna; Bahubalindruni, Pydi Ganga Mamba (Advisor); Barquinha, Pedro (Advisor); Goes, João (Advisor); Deb, Sujay (Advisor) (IIIT-Delhi, 2022-12)
    The successive approximation-register (SAR) analog-to-digital converters (ADCs) have excellent energy efficiency compared to other Nyquist-rate ADCs like Flash,Pipeline, etc. The simplest form of a SAR ADC employs ...
  • Evaluation framework for technology agnostic hybrid NoC architecture 
    Kishore, Raghav; Deb, Sujay (Advisor) (2016-09-12)
    Performance of emerging multicore systems is significantly influenced by the efficiency of the communication fabric that glues the entire system together. Large number of cores results in excessive energy consumption while ...
  • Exploration of real value modelling for complex mixed signal verification 
    Das, Pallavi; Deb, Sujay (Advisor) (2015-12-07)
    With the demand to have more functionality in today's systems, the high performance SOC will have to further accommodate Analog and Mixed Signal (AMS) designs. Also, due to increasing unpredictability and complexity of ...
  • Flexible electronics based efficient front-end circuits for noninvasive continuous health monitoring in biomedical wearable devices 
    Nishtha; Bahubalindruni, Pydi Ganga Mamba (Advisor); Deb, Sujay (Advisor) (IIIT-Delhi, 2021-03)
    With the new habits of lifestyle, new health problems are arising and demands continuous health monitoring. Wearable technology will revolutionize our lives in the upcoming years. To enable widespread usage of such devices, ...
  • FPGA implementation of RISC-V for efficient edge application 
    Bansal, Swapnil; Goel, Hritik; Deb, Sujay (Advisor) (IIIT-Delhi, 2021-05)
    Reduced Instruction Set Computing (RISC) is an open-source, exible & easy-to-use ISA widely adopted for many applications. In the previous semester, we built the FPGA based RISCV-32I architecture capable of executing ...
  • A High-e cient current-mode PWM DC-DC buck converter using dynamic frequency scaling 
    Rehani, Ankit; Deb, Sujay (Advisor); Bahubalindruni, Pydi Ganga Mamba (Advisor); Odedara, Bhavin (Advisor) (IIIT-Delhi, 2018-06)
    Power Management Integrated Circuits (ICs), such as high-efficient switched mode dc- dc converters are essential building blocks in portable battery operated devices. This work presents design and implementation of a ...
  • Implementation of an accelerator for edge computing devices 
    Gupta, Garvit; Deb, Sujay (Advisor) (IIITD, 2021-05-10)
    Edge computing is a distributed computing paradigm that brings computation and data storage closer to the location where it is needed to improve response times and save bandwidth. Two important aspects of edge computing ...
  • Implementation of cache-coherent NoC for multi-core systems 
    Pai, Ullas Ravindra; Deb, Sujay (Advisor) (IIIT-Delhi, 2023-12-05)
    In a multi-core system, each core has its own local cache, which stores copies of data from the main memory. In a single program, different threads might run on separate cores to perform parallel tasks. These threads could ...

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