Please use this identifier to cite or link to this item: http://repository.iiitd.edu.in/xmlui/handle/123456789/1885
Title: Development of open source multicore system
Authors: Ayyagari, Krishna
Deb, Sujay (Advisor)
Keywords: Network on Chip
Open Source Core Architecture
Cache Coherence
Issue Date: Dec-2024
Publisher: IIIT-Delhi
Abstract: This project aims to create an open-source, cache-coherent multicore system that uses the combined processing power of multiple cores arranged in a network-on-chip (NoC) architecture. This semester, the project focused on understanding and implementing the basics of NoC architectures. It started with a detailed study of NoC concepts, including routing techniques and their importance in multicore systems. A simple 2x2 NoC model was developed to test basic functionality and identify challenges related to scaling and performance. In parallel, work was done on the Ibex core, an open-source RISC-V processor developed by the lowRISC community. Functional codes were successfully run on the core, providing insights into its design and capabilities. The study also covered cache coherence, focusing on its role in maintaining data consistency across cores, laying the groundwork for tackling these challenges in future work.
URI: http://repository.iiitd.edu.in/xmlui/handle/123456789/1885
Appears in Collections:Year-2024

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