IIIT-Delhi Institutional Repository

Browsing Electronics and Communication Engineering by Title

Browsing Electronics and Communication Engineering by Title

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  • Power estimation of in-memory compute based memory arrays using simulink blocks 
    Mohd, Aamir; Grover, Anuj (Advisor) (IIIT-Delhi, 2022-10)
    System-on-Chip (SoC) incorporates all the components of any system onto a single integrated circuit. Their compact, power-efficient architecture allows them to be used in various applications like automotive, consumer ...
  • Power estimation using transaction level modeling 
    Chandoke, Nidhi; Deb, Sujay (Advisor) (2015-12-07)
    The increasing complexity of current day Systems-on-Chip and the rising market demands for low power devices has necessitated the need to perform power analysis of the complete system-on-chip at system level. This ...
  • Power network analysis using frequency domain approach 
    Jain, Abhishek; Hashmi, Mohammad S. (Advisor) (2015-12-07)
    With reduction in size and shrinking in geometry, we have reached a point in time in which we no more can draw a direct correlation of the performance of the IC design with respect to the number of transistors on a single ...
  • Power- and performance-aware on-chip interconnection architectures for many-core systems 
    Mondal, Hemanta Kumar; Deb, Sujay (Advisor) (IIIT-Delhi, 2017-04)
    Networks-on-Chip (NoCs) are fast becoming the de-facto communication infrastructures in Chip Multi-Processors (CMPs) for large-scale applications. The traditional approaches of implementing a NoC with planar metal interconnects ...
  • A practical methodology to waive marginal timing violations using machine learning 
    Kumar, Rajat; Saurabh, Sneh (Advisor) (IIIT-Delhi, 2022-07)
    Achieving timing closure is a challenging task, and it becomes more complicated due to the artificial pessimism in the traditional timing models of the flip-flops. During the signoff stages, we can alleviate this problem ...
  • Predictive analysis of safety subsystems in memories for diagnostic coverage 
    Srinivasan, Arvind; Hashmi, Mohammad S. (Advisor); Janardan, Dhori Kedar (Advisor) (2015-12-07)
    Automobile safety is becoming an important subject because of the large number of electronic systems being integrated within a System on Chip (SoC) and with the use of current state-of-the-art technology, safety is becoming ...
  • Probability of target detection in bistatic and multistatic radars 
    Singhal, Shubhi; Ram, Shobha Sundar (Advisor) (IIIT-Delhi, 2022-05)
    In the first part of the work, we evaluate the detection performance of a bistatic radar using a metric called bistatic radar detection coverage probability. The setting considered for the target detection consists of noise ...
  • Process, voltage and temperature compensated oscillator for phase change memories 
    Tyagi, Vivek; Hashmi, Mohammad S. (Advisor) (2017)
    Non Volatile Memories (NVM’s) are an integral part of every System-on-Chip (SoC) for retaining the data when power goes off. Phase change memory (PCM) is type of NVM and exhibits significant advantages over existing NVM ...
  • Radar sensor networks 
    Badri, M.; Raman, Rajiv (Advisor); Ram, Shobha Sundar (Advisor) (IIIT- Delhi, 2021-05)
    This work aims at interference mitigation in recently booming automotive radar networks, via careful beam forming techniques based on Geometric Algorithms and Optimizations. We first thoroughly explore a relatively simple ...
  • Razor flop based on chip delay measurement 
    Vasisth, Aditya; Hashmi, Mohammad S. (Advisor); Jain, Abhishek (Advisor) (2015-12-05)
    Moving towards deep submicron technologies, consideration for design margin will increase. In these technologies, process variation will increase the requirements of design margins. Lower supply voltage and higher clock ...
  • Realistic rendering of 3D avatar using physics simulation and minimal sensors 
    Acharya B, Srikrishna; Sujit, PB (Advisor) (2014-07-10)
    Physics simulation o ers the option of truly receptive and realistic animation. Although wide ac- ceptance of physics simulation for the animation, commercial applications still relies on kinematics- based approaches for ...
  • Realizing and functionality using single tunnel field-effect transistor 
    Banerjee, Saptak; Saurabh, Sneh (Advisor) (IIIT-Delhi, 2018-07)
    In this thesis, a single Double-Gate Tunnel Field-Effect Transistor (DGTFET) is proposed to realize the AND functionality. Using two-dimensional device simulations, it is shown that a single DGTFET can realize logic ...
  • Reconfigurable and intelligent architectures for deep learning algorithms 
    Rajesh, Rohith; Darak, Sumit Jagdish (Advisor); Jain, Akshay (Advisor) (IIIT-Delhi, 2021-12)
    Throughout the course of this BTP, we e ciently implement a Deep Learning Architecture(DLWSS) for Spectrum Sensing problem on the FPGA. This involved training the model from scratch on Pytorch/Keras, extracting the weights ...
  • Reconfigurable architectures for online machine learning 
    Santosh, Siripurapu Venkata Sai; Darak, Sumit J. (Adviosr) (IIIT- Delhi, 2020-12)
    Multi-armed bandit (MAB) algorithms are designed to identify the best arm among several arms in an unknown environment. They guarantee optimal balance between exploration (select all arms sufficient number of times) and ...
  • Reduced mutual coupling for through wall radars using orthogonally polarized antennas 
    Kaur, Guntaas; Ram, Shobha Sundar (Advisor) (IIIT-Delhi, 2017-12)
    There has been a growing interest in building through-the-wall radars (TWR) for law enforcement, security and biomedical applications for tracking humans in urban environments. Designing the antennas for such systems is a ...
  • Reducing test time using regression algorithms in post silicon validation 
    Mamodia, Shivani; Subramanyam, A.V. (Advisor) (IIIT-Delhi, 2020-07-01)
  • Regularized autoencoders 
    Gupta, Kavya; Majumdar, Angshul (Advisor) (2016-11-09)
    Autoencoders are Neural Networks trained in order to map input to its output. Autoencoders are designed to enable the network to copy input to output as close as possible. Following this, the network will be able to learn ...
  • Relative position covariance estimation of resident space objects using extrapolated single propagation technique 
    Suresh, Ardra; Biswas, Sanat (Advisor) (IIIT-Delhi, 2022-07)
    Due to the ever-increasing space activities, there has been a stark increase in the number of space objects and debris, which include defunct satellites, pieces of space hardware, and launch vehicle remains. This poses a ...
  • Reliability aware intelligent memory management (RAIMM) 
    Rout, Sidhartha Sankar; Deb, Sujay (Advisor) (2014-07-10)
    The growing technology scaling and larger die size of multi-processor System-on-Chip (SoC) have increased the error rates for on-chip memories. Increased system speed for high performance, aggressive voltage scaling for ...
  • Resource allocation problems in G.fast and enterprise Wi-Fi networks 
    Raj, Ankita; Biyani, Pravesh (Advisor) (2016-09-13)
    This thesis addresses resource allocation problems in two different domains: G.fast and Wi-Fi. One of the key challenges in G.fast is to minimize power consumption at the distribution points. G.fast standards define ...

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