Reliability aware intelligent memory management (RAIMM)

Abstract

The growing technology scaling and larger die size of multi-processor System-on-Chip (SoC) have increased the error rates for on-chip memories. Increased system speed for high performance, aggressive voltage scaling for power reduction and intra-die process variation have exaggerated the unreliability issues. Hence a method for memory management on SoCs to enhance their reliability is discussed, consisting of a mechanism for automatically moving the contents of a less reliable memory to a more reliable memory. The solution module designed as RAIMM (Reliability Aware Intelligent Memory Management) is an architectural framework to dynamically compute reliability of the on-chip memories and provide a better reliable solution for the application in case of any memory failure. The silicon characterization data is used in conjunction with the on-chip process/voltage/temperature sensors to correctly estimate the memory reliability status. It provides a ranking mechanism for the available memories based on the operating conditions, silicon characterization data as well as dynamic access profiling data, which can be used to provide a method to accurately predict memory failure in advance to the application. A Direct Memory Access (DMA) engine ensures the efficient working of overall application with low overhead for software in maintaining the memory configuration and contents.