Please use this identifier to cite or link to this item: http://repository.iiitd.edu.in/xmlui/handle/123456789/542
Full metadata record
DC FieldValueLanguage
dc.contributor.authorTarun, Kunwar-
dc.contributor.authorHashmi, Mohammad S. (Advisor)-
dc.date.accessioned2017-11-10T10:22:33Z-
dc.date.available2017-11-10T10:22:33Z-
dc.date.issued2017-05-
dc.identifier.urihttp://repository.iiitd.edu.in/xmlui/handle/123456789/542-
dc.description.abstractThe circuits having more than two logic levels called as multiple valued circuits have the potential of reducing area by reducing the on chip interconnection. Despite considerable effort, designing a system for processing a multiple valued signal is still a complicated task. Multiple valued circuits can be realized in voltage or current mode. Due to limited power supply, higher radix valued system is not feasible to design using voltage mode configuration. On the other hand, current mode circuits have the capability of scaling, copying, inverting using basic current mirror structure. The non self restoring nature and higher static power dissipation is the major problem in multiple valued current mode circuits. Self restoration circuits need to be developed for correct detectable output. In this study, performance of various fundamental current mode multiple valued operator is analyzed across different process corner and over wide temperature range. Voltage mode binary to current mode multiple valued encoding and current mode multiple valued to voltage mode binary decoding are presented here. Several combinational circuits such as Multiplexer, Demultiplexer and Full adder are proposed and discussed. Further sequential circuits such as Latch, D Flip-Flop, counters and arbitrary selected state diagram are presented here. Finally, 2-bit binary parallel adder and 1-digit quaternary full adder is compared in terms of various VLSI design criteria.en_US
dc.language.isoen_USen_US
dc.subjectVLSIen_US
dc.subjectCMOSen_US
dc.titleMultiple valued current mode logic circuitsen_US
dc.typeThesisen_US
Appears in Collections:Year-2017

Files in This Item:
File Description SizeFormat 
MT15100 - Kunwar Tarun.pdf2.17 MBAdobe PDFView/Open


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.