Realizing and functionality using single tunnel field-effect transistor

Abstract

In this thesis, a single Double-Gate Tunnel Field-Effect Transistor (DGTFET) is proposed to realize the AND functionality. Using two-dimensional device simulations, it is shown that a single DGTFET can realize logic functionality by biasing the two gate terminals independently. The key elements in obtaining the required functionality using a DGTFETare:1. Employing a gate-source overlap2. choosing an appropriate silicon body thickness.The two-dimensional device simulations demonstrate that the electrical characteristics of the proposed device correctly implements the AND functionality. Specifically, the drain current under the biasing conditions at two inputs 11, 01, 10 and 00 are in the order of 1 _ 10􀀀8, 1 _ 10􀀀15 1 _ 10􀀀15 and 1 _ 10􀀀15 respectively. Therefore, an impressive ION=IOFF ratio of 1 _ 108 is attained.Further, it is demonstrated that realized device is operational even for low supply voltages.But the ION=IOFF ratio keeps on deteriorating as the supply voltage is reduced.However, for future applications, it must be ensured that the proposed device must exhibit sufficiently high ION=IOFF ratio, especially at low supply voltages. In this thesis, the challenges involved in enhancing the ION=IOFF ratio in a TFET that realizes the AND functionality, are investigated. The study shows that the techniques that boost the ION in a TFET, for example using a low bandgap material, does not necessarily enhance the ION=IOFF ratio in the device. This is primarily due to challenges involved in turning-OFF the device when only one of the terminals is biased at logic “1”. Further, the efficacy of using Dual Material Gate (DMG) and optimizing silicon body thickness to improve the ION=IOFF ratio is explored.