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dc.contributor.authorAamir, Mohd.-
dc.contributor.authorGrover, Anuj (Advisor)-
dc.date.accessioned2022-03-31T09:02:01Z-
dc.date.available2022-03-31T09:02:01Z-
dc.date.issued2021-05-
dc.identifier.urihttp://repository.iiitd.edu.in/xmlui/handle/123456789/990-
dc.description.abstractEncryption algorithms are used to protect confidential data from unauthorized access by scrambling it into an unreadable format, using a private key. The security of the algorithm is largely dependent on the safety of the key. Although mathematically impenetrable by brute force, recently lots of research has been done on various side-channel attacks for the implementation of these algorithms. The purpose of this research is to build a secure hardware-based implementation for encryption schemes to mitigate the possibility of side-channel attacks. The architectures designed using Virtuoso by Cadence and verification is done using the Eldo Simulator. In this project, in-memory and near memory computing based architectures are used to implement Advanced Encryption Scheme and Chacha20 algorithms.en_US
dc.language.isoen_USen_US
dc.publisherIIIT- Delhien_US
dc.subjectSide-Channel Attacksen_US
dc.subjectHardware Securityen_US
dc.subjectChacha20en_US
dc.subjectAdvanced Encryption Schemeen_US
dc.subjectCache-based Encryptionen_US
dc.titleImplementation of encryption algorithms in SRAM based memoryen_US
dc.typeOtheren_US
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