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A successive approximation register based digital delay locked loop for clock and data recovery circuits

Mittal, Priyanka; Bahubalindruni, Pydi Ganga Mamba (Advisor); Odedara, Bhavin (Advisor) (2018-07)

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- Bahubalindruni, Pydi Ganga Mamba (Advisor) (1)
- Mittal, Priyanka (1)
- Odedara, Bhavin (Advisor) (1)
Date Issued
- 2018 (1)