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Efficient post-silicon debug platforms for future many-core systems
Rout, Sidhartha Sankar
;
Deb, Sujay (Advisor)
(
IIIT-Delhi
,
2023-06
)
To study the impact of process variations on NoC performance: a circuit-centric approach
Anushka
;
Deb, Sujay (Advisor)
(
IIIT-Delhi
,
2023-12
)
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Author
Deb, Sujay (Advisor) (2)
Anushka (1)
Rout, Sidhartha Sankar (1)
Subject
CMOS logic (1)
Efficient Post-Silicon Debug Structures for NoC Based Systems (1)
Gate implementation (1)
NoC Architecture and Operation (1)
NoC Fault Model (1)
Pass gate logic (PMOS) (1)
Post-Silicon Debug Challenges (1)
VC power management in NoC (1)
... View More
Date Issued
2023 (2)