Abstract:
Very-Large-Scale Integration (VLSI) design is constantly evolving with advancements in semiconductor technology. Static Timing Analysis (STA) is a crucial aspect of VLSI design that ensures circuit reliability and functionality by focusing on structural and timing constraints without considering signal transitions. On the other hand, dynamic timing analysis simulates signal behaviour during circuit operation. This project delves into the impact of multiple input switching (MIS) on selected combinational cells at advanced technology node, specifically the 7nm node. A comprehensive dataset was collected using SPICE simulations in Cadence (VIRTUOSO), and data was generated using Ocean Script (skill). The dataset enables the analysis of MIS effects on non-inverted (AND2X1, OR2X1), inverted (NAND2X1, NOR2X1) and complex (AOI21X1 and OAI21X1) gates. Graphical representations derived from this dataset clarify the varied influence of MIS on gate performance. Technological libraries, particularly in Liberty format, are vital in the semiconductor design industry, providing critical information about circuit components and their timing characteristics. However, these libraries face challenges in accurately modelling complex dependencies while maintaining a balance between accuracy and compactness. Despite these challenges, technology libraries remain indispensable in modern semiconductor design. They provide designers with standardized access to essential information to achieve desired circuit functionality. However, in gates with more than two inputs, the complexity of MIS increases exponentially, resulting in significantly larger datasets. Complex gates exhibit varying impacts based on the type of transition, making their analysis more challenging. This 4 project addresses these challenges by extending the scope of MIS analysis to complex gates, employing sensitization-based filtering to manage dataset complexity effectively. The comprehensive approach highlights the importance of accurate modelling and detailed analysis in meeting the demands of advanced semiconductor designs.
