Process, voltage and temperature compensated oscillator for phase change memories

Abstract

Non Volatile Memories (NVM’s) are an integral part of every System-on-Chip (SoC) for retaining the data when power goes off. Phase change memory (PCM) is type of NVM and exhibits significant advantages over existing NVM alternatives, such as fast read access time, high write endurance, higher retention time and fast modify cycles. In PCM, the current pulses are used to change the state of bit cells (set or reset) and duration of current pulse is decided by the on-chip oscillator. The large inaccuracy in oscillation frequency will result in unreliable modify operation and may cause failure in read-write operations. The commonly used high accuracy clock references are realized by crystal oscillators, as they are immune to process, voltage and temperature variations, but integrating them with on-chip circuits increases the overall cost and power of system. Hence, it is important to investigate the high accuracy on chip clock generation strategy for low cost and low power applications. In this dissertation, a 10MHz, 84μW, 73ppm/. PVT compensated ring oscillator and 10 MHz, 69μW, 42ppm/. PVT compensated latch based oscillator is presented in 110nm BCD9S Technology for PCM application. The presented PVT compensated oscillators consumes significant lesser power as well as area compared to traditional crystal counterparts. An on-chip voltage regulator is also designed to generate stable supply for oscillator and associated bias circuits to generate the frequency reference immune of large supply variations.