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Multilevel rram design using confinement of conducting Filament

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dc.contributor.author Kapur, Shagun
dc.contributor.author Gupta, Varshita
dc.contributor.author Saurabh, Sneh (Advisor)
dc.contributor.author Grover, Anuj (Advisor)
dc.date.accessioned 2019-10-05T07:36:36Z
dc.date.available 2019-10-05T07:36:36Z
dc.date.issued 2019-04-25
dc.identifier.uri http://repository.iiitd.edu.in/xmlui/handle/123456789/734
dc.description.abstract There are several types of electronic memory employed across the globe for a huge variety of applications. These include fast, volatile technologies such as SRAM and DRAM, and slower, non-volatile technologies such as NAND and NOR Flash. These memories, however, are limited in their scaling opportunities by their internal charge-based operation. There are multiple upcoming memories including RRAM, PCRAM, FeRAM, MRAM, etc. which attempt to combine non-volatility with speed while being non-charge based. Out of these, RRAM is a promising device that exhibits very high speeds, is highly scaleable and has low power consumption. Some issues such as variability still exist in the RRAM device, which are currently under heavy research. A vast literature exists in the domain of resistive random access memory and we have attempted to amalgamate the research by writing a review paper on the same. After reviewing the research, we have implemented multilevel RRAM operation on a novel software called SIM2RRAM. en_US
dc.language.iso en_US en_US
dc.publisher IIITD-Delhi en_US
dc.subject RRAM en_US
dc.subject Conducting filament en_US
dc.subject Reliability en_US
dc.subject Mismatches en_US
dc.subject FOM en_US
dc.subject Multi-bit en_US
dc.title Multilevel rram design using confinement of conducting Filament en_US
dc.type Other en_US

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