Design of sub 1v capacitorless low dropout regulator in 65nm technology

Abstract

In recent times there has been tremendous research in the field of bio-medical, particularly towards implantable medical devices. Implantable devices must be compact and have good battery life with stable supply voltage. For example, pacemaker must have a long battery life and should be provided a constant supply voltage. This creates a growing demand for low power low dropout regulators (LDO). LDOs are circuits which provide constant supply voltage even when the power supply is fluctuating. The limited headroom for low power analog LDO can be challenging while designing. In this work, the error amplifier is designed using a folded cascode structure. The work also targets having low line regulation and load regulation for a wide range of voltage and current variations. This type of design helps in providing longer battery life to implantable devices. In this dissertation, we propose Low power sub-1V capacitorless Low Dropout Regulator (LDO) on 65nm Technology. The max driving current is 10mA working at a temperature range of -40oC to 125oC with a low quiescent current consumption. This work achieves line regulation of 5.45𝑚𝑉𝑉⁄ and load regulation of 0.005𝑚𝑉𝑚𝐴⁄ and consumes 5.64𝜇𝑊 power.