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Implementation of encryption algorithms in SRAM based memory

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dc.contributor.author Aamir, Mohd.
dc.contributor.author Grover, Anuj (Advisor)
dc.date.accessioned 2022-03-31T09:02:01Z
dc.date.available 2022-03-31T09:02:01Z
dc.date.issued 2021-05
dc.identifier.uri http://repository.iiitd.edu.in/xmlui/handle/123456789/990
dc.description.abstract Encryption algorithms are used to protect confidential data from unauthorized access by scrambling it into an unreadable format, using a private key. The security of the algorithm is largely dependent on the safety of the key. Although mathematically impenetrable by brute force, recently lots of research has been done on various side-channel attacks for the implementation of these algorithms. The purpose of this research is to build a secure hardware-based implementation for encryption schemes to mitigate the possibility of side-channel attacks. The architectures designed using Virtuoso by Cadence and verification is done using the Eldo Simulator. In this project, in-memory and near memory computing based architectures are used to implement Advanced Encryption Scheme and Chacha20 algorithms. en_US
dc.language.iso en_US en_US
dc.publisher IIIT- Delhi en_US
dc.subject Side-Channel Attacks en_US
dc.subject Hardware Security en_US
dc.subject Chacha20 en_US
dc.subject Advanced Encryption Scheme en_US
dc.subject Cache-based Encryption en_US
dc.title Implementation of encryption algorithms in SRAM based memory en_US
dc.type Other en_US


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