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Issue Date	Title	Author(s)
2016-10-05T11:01:43Z	Automated, inter-macro channel space adjustment and optimization for faster design closure	Kumar, K K Praveen; Fell, Alexander (Advisor)
2014-07-11T04:37:31Z	A wordline voltage management for NOR type flash memories	Sinha, Rohan; Hashmi, Mohammad S. (Advisor)
2016-09-12T09:17:14Z	Design and analysis of sense amplifier topologies for volatile and non-volatile memories	Arora, Disha; Hashmi, Mohammad S. (Advisor)
2015-12-07T08:12:31Z	Novel approach to reusable time-economized STIL based pattern development	Malhotra, Rahul; Deb, Sujay (Advisor)
2016-10-05T11:27:07Z	Design of high gain and low noise figure on-chip LNA for Ku band application	Sharma, Vijay; Hashmi, Mohammad S. (Advisor)
2015-12-07T08:47:42Z	Power network analysis using frequency domain approach	Jain, Abhishek; Hashmi, Mohammad S. (Advisor)
2017-07	Candidate waveforms for wireless communications: analysis via hardware software co-design on Zynq SoC	Garg, Sasha; Darak, Sumit Jagdish (Advisor)
2016-09-12T08:35:56Z	A scalable solution for cache coherence in many-core systems using share-pattern aware cache segmentation and hybrid network-on-chip	Ganguly, Antara; Deb, Sujay (Advisor)
2020-07	Solar panel as a receiver	Naqvi, Sana Ali; Srivastava, Anand (Advisor); Mitra, Abhijit (Advisor)
2020-08	Low power low phase noise LC VCO for sub GHZ range in 40nm technology	Sharma, Sapna; Visweswaran, G S (Advisor); Sengupta, Susanta (Advisor)