Browsing MTech Theses by Title

Now showing items 1-20 of 153

A 28Gbps serializer & deserializer for high speed IO links

Awasthi, Mudit; Grover, Anuj (Advisor) (2019-06)

Technology scaling and continuous increase in data rate have been the driving forces leading the innovations in high-speed interfaces. With the growing need for ultra-low power and high-speed data rate signaling, integrated ...
3D path planning of UAV using model predictive control

Singhal, Rahul; Sujit, PB (Advisor) (2015-12-07)

Path planning is essential for UAVs that travel in different terrains. Designing feasible path planners for UAVs taking the dynamic constraints is difficult. In this thesis, we develop a 3D path planner using model ...
Accounting for the correlation between low-threshold and high-threshold transistors using analytical techniques

Pandey, Prashasti; Saurabh, Sneh (Advisor) (IIIT-Delhi, 2024-06-01)

With the scaling of semiconductor technology nodes, the impact of process-induced variations has increased. Statistical static timing analysis accounts for global and local variations in the timing analysis. The present ...
Actively controlled retention voltage of SRAMs

Mamgain, Ankush; Grover, Anuj (Advisor) (IIIT-Delhi, 2018-07)

In advance technology nodes, static power consumption is a major component of total system power in systems that do not continuously operate at very high clock frequency. SRAMs not only contribute a major portion of SoC ...
Adapting vehicular planning and communications for optimized driving

Pal, Mayank Kumar (IIIT-Delhi, 2020-07)

Connected Autonomous Vehicles (CAVs) have for long had the attention of the intelligent transportation systems community due to their promise of improving road safety and efficiency via increased perception. CAVs broadly ...
Analysis and estimation of jitter sub-components

Sharma, Vijender Kumar; Deb, Sujay (Advisor) (IIIT Delhi, 2014-09-06)

Maintaining quality of signal transmission is a major challenge with the increasing speed of data transmission in Nano-scale VLSI technology. The decreasing voltage margins at the same time, makes it even stringent to ...
Analysis dictionary learning for classification

Bhattacharjee, Protim; Majumdar, Angshul (Advisor) (2016-09-13)

Data classification is the core of leading technologies today. With the explosion of data through mobility and growth of the Internet, analysis and classification of data is the immediate process after acquisition. Most ...
Analysis of circuits with partially correlated multi-Vt cell variations using sensitivity modeling and propagation

Ubaida, Mohd Abu; Saurabh, Sneh (Advisor) (IIIT-Delhi, 2025-05-19)

Traditional Static Timing Analysis (STA) tools, commonly used in digital circuit design, usually assume that variations in low-threshold voltage (LVT) and high-threshold voltage (HVT) transistors are fully correlated. This ...
Analysis of mobile backhaul for 5g using optical distribution network of PON

Khandelwal, Aanchal; Srivastava, Anand (Advisor) (2017-12)

This thesis work provides theoretical analysis of an optical distribution network (ODN) that integrates mobile backhaul network with already existing passive optical network (PON). The need to reduce the cost of laying ...
An artificial neural network based incremental placer for wire length reduction

Gagandeep; Saurabh, Sneh (Advisor) (IIIT-Delhi, 2022-08)

The total wire length of a design affects various QoR measures such as timing, power, and routability. Hence, it is a critical parameter to optimize in physical design. Post global routing, the total wire length can be ...
Asymmetric high-density low leakage SRAM cells

Shroti, Ajay; Grover, Anuj (Advisor) (IIIT-Delhi, 2024-05-15)

Embedded memories occupy up to 70% of the area and account for 30-50% power consumption in advanced digital SoCs. A large part of this power is leakage power. Therefore, high-density, low-leakage SRAM cells are desirable. ...
Asynchronous 1R-1W dual-port SRAM by using single-port SRAM

Bharath, K; Fell, Alexander (Advisor) (2016-12)

With the advancement in technology nodes, the number of components operating in different clock domains on System on Chip (SoC) increases. To support the processing of data between these components, the demand of an ...
Automated, inter-macro channel space adjustment and optimization for faster design closure

Kumar, K K Praveen; Fell, Alexander (Advisor) (2016-10-05)

Achieving optimal floor-plans during the physical synthesis flow is an iterative and resource intensive process and its quality has a significant impact on subsequent synthesis stages in terms of runtime and quality of ...
Balancing content retention in neural style transfer

Agrawal, Yash; Abrol, Vinayak (Advisor) (IIIT-Delhi, 2025-05)

This thesis work focuses on advancements in neural style transfer, a process that enables the blending of content and style features to generate stylized images. It explores feature extraction using two encoders: a VGG19-based ...
Blind parameters estimation by exploiting cyclostationary features in wavelet domain

Kumar, Sushant; Bohara, Vivek Ashok (Advisor) (2016-09-23)

In dynamic environment, multi-standard wireless communication receivers capable of estimating the various parameters of any unknown modulated signal are desired. These parameters include symbol rate, modulation type, ...
Blind reconstruction and automatic modulation classifier for non-uniform sampling based wideband communication receivers

Joshi, Himani; Darak, Sumit Jagdish (Advisor) (2016-09-13)

Electromagnetic spectrum is a limited natural resource and needs to be used efficiently. However, various measurements conducted worldwide have observed poor spectrum utilization. Software defined radios (SDRs) and cognitive ...
Candidate waveforms for wireless communications: analysis via hardware software co-design on Zynq SoC

Garg, Sasha; Darak, Sumit Jagdish (Advisor) (2017-07)

Upcoming wireless communication networks are expected to support the wide variety of services ranging from low data rate applications such as wireless sensor networks to high data rate delay sensitive multimedia services. ...
Capacitor-less low dropout regulator (LDO)

Gupta, Ravi Kumar; Visweswaran, G S (Advisor) (IIIT-Delhi, 2020-07)

An output capacitor-less low-dropout (LDO) regulator with a wide range of load currents is proposed. It is based on the requirement of static comparator and current sinking circuit to control the gate of pmos pass gate. ...
Change detection based Thompson sampling algorithm for non-stationary bandits

Zaid, Kunwar; Ghatak, Gourab (Advisor) (IIIT-Delhi, 2020)

The stationary multi-armed bandit (MAB) framework is a well-studied problem in literature, with many rigorous mathematical treatments and optimal solutions. However, for a non-stationary environment, i.e., when the reward ...
Circularly polarized fabry perot cavity antennas with peripheral roughness in superstrate unit cells

Jain, Sagar; Ram, Shobha Sundar (Advisor) (IIIT-Delhi, 2019-09)

A Fabry Perot cavity (FPC) antenna consists of a primary radiator at the base of a dielectric cavity sealed with a partially reflecting surface at the other end. Excitation from the radiator is partially reflected by the ...

Now showing items 1-20 of 153

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